libgambatte: simplify a bit

master
sinamas 2019-08-12 07:04:49 +02:00
parent cca5f5a5bf
commit cfdc505f23
3 changed files with 15 additions and 30 deletions

View File

@ -1194,7 +1194,7 @@ void gambatte::setInitState(SaveState &state, bool const cgb, bool const gbaCgbM
setInitialDmgIoamhram(state.mem.ioamhram.ptr);
}
state.mem.ioamhram.ptr[0x104] = 0x1C;
state.mem.ioamhram.ptr[0x104] = 0x00;
state.mem.ioamhram.ptr[0x140] = 0x91;
state.mem.ioamhram.ptr[0x144] = 0x00;
@ -1202,7 +1202,7 @@ void gambatte::setInitState(SaveState &state, bool const cgb, bool const gbaCgbM
// This also applies to the TIMA and PSG frame sequencer, which may suggest
// that div reset could affect the other two.
// TODO: test whether div reset can affect other counters.
state.mem.divLastUpdate = 0;
state.mem.divLastUpdate = -0x1C00;
state.mem.timaLastUpdate = 0;
state.mem.tmatime = disabled_time;
state.mem.nextSerialtime = disabled_time;
@ -1221,7 +1221,6 @@ void gambatte::setInitState(SaveState &state, bool const cgb, bool const gbaCgbM
state.mem.rambankMode = false;
state.mem.hdmaTransfer = false;
for (int i = 0x00; i < 0x40; i += 0x02) {
state.ppu.bgpData.ptr[i ] = 0xFF;
state.ppu.bgpData.ptr[i + 1] = 0x7F;

View File

@ -67,6 +67,7 @@ void Memory::setStatePtrs(SaveState &state) {
unsigned long Memory::saveState(SaveState &state, unsigned long cc) {
cc = resetCounters(cc);
ioamhram_[0x104] = 0;
nontrivial_ff_read(0x05, cc);
nontrivial_ff_read(0x0F, cc);
nontrivial_ff_read(0x26, cc);
@ -96,7 +97,7 @@ void Memory::loadState(SaveState const &state) {
cart_.loadState(state);
intreq_.loadState(state);
divLastUpdate_ = state.mem.divLastUpdate;
divLastUpdate_ = state.mem.divLastUpdate - 0x100l * state.mem.ioamhram.get()[0x104];
intreq_.setEventTime<intevent_serial>(state.mem.nextSerialtime > state.cpu.cycleCounter
? state.mem.nextSerialtime
: state.cpu.cycleCounter);
@ -456,16 +457,9 @@ unsigned long Memory::resetCounters(unsigned long cc) {
updateIrqs(cc);
{
unsigned long divinc = (cc - divLastUpdate_) >> 8;
ioamhram_[0x104] = (ioamhram_[0x104] + divinc) & 0xFF;
divLastUpdate_ += divinc << 8;
}
unsigned long const dec = cc < 0x10000
unsigned long const dec = cc < 0x20000
? 0
: (cc & ~0x7FFFul) - 0x8000;
decCycles(divLastUpdate_, dec);
: (cc & -0x10000l) - 0x10000;
decCycles(lastOamDmaUpdate_, dec);
decEventCycles(intevent_serial, dec);
decEventCycles(intevent_oam, dec);
@ -574,13 +568,7 @@ unsigned Memory::nontrivial_ff_read(unsigned const p, unsigned long const cc) {
updateSerial(cc);
break;
case 0x04:
{
unsigned long divcycles = (cc - divLastUpdate_) >> 8;
ioamhram_[0x104] = (ioamhram_[0x104] + divcycles) & 0xFF;
divLastUpdate_ += divcycles << 8;
}
break;
return (cc - divLastUpdate_) >> 8 & 0xFF;
case 0x05:
ioamhram_[0x105] = tima_.tima(cc);
break;
@ -705,7 +693,6 @@ void Memory::nontrivial_ff_write(unsigned const p, unsigned data, unsigned long
data |= 0x7E - isCgb() * 2;
break;
case 0x04:
ioamhram_[0x104] = 0;
divLastUpdate_ = cc;
return;
case 0x05:

View File

@ -19,9 +19,13 @@
#include "tima.h"
#include "savestate.h"
static unsigned char const timaClock[4] = { 10, 4, 6, 8 };
using namespace gambatte;
namespace gambatte {
namespace {
unsigned char const timaClock[] = { 10, 4, 6, 8 };
}
Tima::Tima()
: lastUpdate_(0)
@ -47,8 +51,8 @@ void Tima::loadState(SaveState const &state, TimaInterruptRequester timaIrq) {
unsigned long nextIrqEventTime = disabled_time;
if (tac_ & 4) {
nextIrqEventTime = tmatime_ != disabled_time && tmatime_ > state.cpu.cycleCounter
? tmatime_
: lastUpdate_ + ((256u - tima_) << timaClock[tac_ & 3]) + 3;
? tmatime_
: lastUpdate_ + ((256u - tima_) << timaClock[tac_ & 3]) + 3;
}
timaIrq.setNextIrqEventTime(nextIrqEventTime);
@ -128,13 +132,10 @@ void Tima::setTac(unsigned const data, unsigned long const cc, TimaInterruptRequ
if (tac_ & 0x04) {
updateIrq(cc, timaIrq);
updateTima(cc);
// FIXME: this looks naive.
// TODO: more TIMA tests.
lastUpdate_ -= (1u << (timaClock[tac_ & 3] - 1)) + 3;
tmatime_ -= (1u << (timaClock[tac_ & 3] - 1)) + 3;
nextIrqEventTime -= (1u << (timaClock[tac_ & 3] - 1)) + 3;
if (cc >= nextIrqEventTime)
timaIrq.flagIrq();
@ -167,5 +168,3 @@ void Tima::doIrqEvent(TimaInterruptRequester timaIrq) {
timaIrq.setNextIrqEventTime(timaIrq.nextIrqEventTime()
+ ((256u - tma_) << timaClock[tac_ & 3]));
}
}